Packaging semiconductors is a vital aspect of semiconductor manufacturing. There are many types of packaging configurations available, such as ball grid arrays (BGA), flip chip and more recently, chip-scale packages. Basically, chip-scale packages can be categorized as flex substrate, rigid substrate, lead frame and wafer-level assembly. In the categories of flex substrate and rigid substrate, both flip chip and wire bonding technologies may be used.
Flip chip packages are quite fragile and require careful assembly and handling techniques. Chip-scale packages are being developed to combine the high density of the BGA packages and the small size of the flip chip packages. The chip-scale package need only be slightly larger than the bare chip.
An example of a packaging technique for a conventional flip chip chip-scale package (CSP) is shown in FIG. 1. In the flip chip CSP, a semiconductor die 101 is first mounted to the top surface of a substrate 102 using flip chip technique. An under fill region 103 is then formed below the die and at an outer circumferential surface of the solder balls 104 formed on the surface of the die 101. In the chip-scale package, solder balls 104 are attached to I,O pads on the surface of the substrate 102.
The packaging technique shown in FIG. 1 has some disadvantages. One is that chips are subject to damage because they are exposed during packaging steps. Another problem is that an external heat sink can not be easily attached to the die for high-power chip packages.
Another example of a conventional packaging technique is shown in FIG. 2, which illustrates the final assembly process of a Mitsubishi CSP. In the final assembly process, four general steps are taken. They are steps of inner bump bonding, encapsulation, base frame separation, and solder ball attachment. At the step of inner bump bonding, the inner bumps 211 are first formed on a base frame 212. The chip is then over-molded with an encapsulating material for protection. External electrode bumps 241 are formed and directly bonded to the bond pads after the inner bumps are separated from the base frame 212. The electrode bumps serve as the external electrodes for surface mounting on a printed circuit board.
The CSP final assembly process shown in FIG. 2 also has some disadvantages. One is forming the inner bumps is a complicate process. Another problem is chips are not easy to be cooled off due to the externally molded plastic protection.